Z-32 CPU

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Z-32 CPU

Postby Zardoz » Mon Oct 07, 2013 7:37 pm

As DarkSpartan asked for a 32 bit CISC CPU -> https://gist.github.com/Zardoz89/6853939#file-t32-md
It's very similar to the DCPU-16 but in 32 bit, with less fairy dust, and addressing bytes, words and dwords. It will need some tweaks and changes, but gives the idea.
Last edited by Zardoz on Thu Oct 10, 2013 7:44 pm, edited 2 times in total.
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Re: T32 CPU

Postby thomas9459 » Mon Oct 07, 2013 8:07 pm

I would propose using a conditional instruction execution scheme like that of ARM since 2^18 is quite a lot of instructions.
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Re: Z-32 CPU

Postby Zardoz » Thu Oct 10, 2013 7:47 pm

I rewrite it to use a multi-byte format that allow better code density and not should be hard to decode. Also, I introduced a switch mode instruction to switch between 16-bit (Z-16 compatibility) and 32-bit mode. I think that the Z-16 mode need some retouches about how will work, as actually is limited to work on the first 64KiB of RAM.
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Re: Z-32 CPU

Postby thomas9459 » Fri Oct 11, 2013 1:37 am

The multiplication timings seem a little high (it is easy to speed up multiplication using carry-save adders). You might want to consider lowering them into the 8-12 cycles range.
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Re: Z-32 CPU

Postby Zardoz » Fri Oct 11, 2013 5:39 am

I put these values of multiplication/division at "eye" , with-out calculation. Keeping in mind that multiplication should enough slow to allow to do old-school optimizations tricks like do 1 or 2 shift + addition for quick multiplications. Also, keeping in mind that the CPU not have a real multiplication unit, only reuses the ALU and internal registers to do the multiplication, so not have special carry-save adders. In this case a 32x32 bit multiplication, using the Booth's algorithm should take :

+ 2 shift operations + 1 NEG operation to form A, S and P in internal 64 bit registers (form Booth's matrix)
+ Do 32 iterations of the add + shift loop
= 2 + 1 + 32*2 = 67 uses of the ALU
This qucik calculation could be interpreted that I did too quick the multiplication operation.
But comparing against real word examples of the 8086/80286/80386 that are of the same time frame period :
Code: Select all
                                  Clocks                Size
        Operands         808x   286   386   486         Bytes

        reg8             80-98   13   9-14  13-18         2
        reg16           128-154  21   9-22  13-26         2
        reg32              -     -    9-38  12-42         2
        mem8             86-104  16  12-17  13-18        2-4
        mem16           134-160  24  12-25  13-26        2-4
        mem32              -     -   12-41  13-42        2-4
        reg16,reg16        -     -    9-22  13-26        3-5
        reg32,reg32        -     -    9-38  13-42        3-5
        reg16,mem16        -     -   12-25  13-26        3-5
        reg32,mem32        -     -   12-41  13-42        3-5
        reg16,immed        -     21   9-22  13-26         3
        reg32,immed        -     21   9-38  13-42        3-6
        reg16,reg16,immed  -     2    9-22  13-26        3-6
        reg32,reg32,immed  -     21   9-38  13-42        3-6
        reg16,mem16,immed  -     24  12-25  13-26        3-6
        reg32,mem32,immed  -     24  12-41


In the 80386 the 32x32 bit multiplication (with registers) are in the range of 8-38 cycles
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Re: Z-32 CPU

Postby thomas9459 » Fri Oct 11, 2013 9:22 pm

I agree: without a dedicated multiplication unit, 30-40 cycles fits very well. Of course, a reduced form of multiplication unit using only 4 or 5 carry-save adders would greatly increase speed without adding too much logic. Either way, the shift and add algorithm, as well as other bit-twiddling techniques, should definitely be encouraged.
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